The semiconductor industry is facing unprecedented challenges due to the limitations of traditional transistor scaling arising from non-scaling of conventional materials (e.g., gate oxide). The industry has aggressively adopted new methods for performance enhancements, like strained silicon. However, continued scaling with strain is expected to be challenging due to increase in defectivity and possible saturation of strain effects. Hence, there is a renewed interest in the integration of group III-V semiconductors and/or group IV semiconductors as new channel materials. This is driven by the need to enhance channel transport as well as to reduce power dissipation. The ability to grow high-quality high-k dielectrics has rejuvenated the possibility of using these alternate substrates.
Germanium based devices are one of the key contenders for replacing silicon as the channel material due to the higher electron and hole mobilities in germanium as compared to silicon. For example, it has been shown that germanium-based transistors can exhibit a 400% greater hole mobility, and a 250% greater electron mobility, than silicon-based transistors. The higher mobility promises improvements in drive currents much beyond that achievable from comparable silicon devices.
In theory, it is possible to make transistors with bulk germanium or Germanium on Insulator (GeOI) substrates that are much faster than those currently made from bulk silicon or SOI (“Silicon-On-Insulator”) substrates. However, a number of practical limitations and challenges have to be overcome to enable such germanium based devices. One such limitation involves the formation of the gate dielectric.
Unlike silicon, germanium does not form a stable oxide. Germanium oxides are volatile and introduce a large number of defect states resulting in poor device reliability. Reliability issues can negate the possible improvements achievable by using germanium transistors. Hence, what is needed are structures and methods of forming gate dielectrics for germanium transistors without degrading device reliability and/or performance.